ST2100 datasheet(31/39 Pages) STMICROELECTRONICS

부품명	ST2100

상세설명	Broadband powerline communication SoC optimized

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ST2100

Clocking parameters

This section details clock related electrical specifications.

6.1

Master clock (MCLK)

The external circuit for generating the clock from a crystal oscillator is shown in Figure 4.

Figure 4. MCLK crystal connections

1. CL1 and CL2 are the load capacitors.

The value of the capacitors depends on the type of the selected crystal. To calculate the

value of the load capacitance, use Equation 1.

For this example, an Aker C2E-24.000-12-3030-X 24 MHz oscillator has been used.

Load capacitance CL:

Equation 1

CL = (CL1 × CL2 / CL1 + CL2) + CS

Where CL1 and CL2 are the load capacitors and CS is the circuit's stray capacitance.

In our application this implies:

Equation 2

CL1 = CL2 = Cext

Equation 3

Cext = (CL - CS) × 2

Example

For the Aker® C2E-24.000-12-3030-X crystal:

CL = 12 PF; with CS = 3 PF, Cext = CL1 = CL2 = 18 PF.

Note:

The ESR of the used quartz must be < 50

.

ST2100 데이터시트(PDF) 31 Page - STMicroelectronics