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L9662 데이터시트(PDF) 65 Page - STMicroelectronics

부품명 L9662
상세설명  Octal squib driver and quad Manchester/PSI5 encoded sensor
PDF  80 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9662 데이터시트(HTML) 65 Page - STMicroelectronics

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L9662
Functional description
79
3.4.7
SPI register definition for satellite functions
The SPI provides access to read/write to the registers internal to the device. All commands
sent to the ASIC shall use set D15 as required for odd parity on the 16 bit word. The total
message length when CS_S is active is 80 bits. The response to the command is sent in the
next valid CS_S.
The following diagram shows the satellite SPI transfer during normal operation. The satellite
data is uploaded based on CS_S going active. All the register data for the channels will be
loaded at the same time.
1
1
01
ON
OFF
Data will reflect if ICHx current
is above/below threshold setting
(1)
D0 = 0 (above thres.)
D0 = 1 (below thres.)
Digital Output
0
0
10
ON
ON
Satellite Data
OFF (HiZ)
0
1
10
ON
ON
Satellite Data
OFF (HiZ)
1
0
10
ON
ON
Empty
Analog Output
(I_Sat/100)
1
1
10
ON
ON
Satellite Data
Digital Output
0
0
11
ON
OFF
Empty
OFF (HiZ)
0
1
11
ON
OFF
Empty
OFF (HiZ)
1
0
11
ON
OFF
Empty
Analog Output
(I_Sat/100)
1
1
11
ON
OFF
Empty
Digital Output
1. IFx/Vx Pin is set as Analog Output (I_Sat/100) but since ICHx is off (HiZ) the IFx/Vx output will look like it is HiZ
Table 33. MCR and CCR settings based on the interfacing to a sensor or satellite (continued)
Register settings
Functions active
Information available
MCR
D7/D6
Bits
MCR
D5/D4
Bits
CCR
D5:D4
Bits
Channel
(ICHx)
Decoder
SPI
DATA register
IFx/Vx pin
Table 34. SPI register definition
Registers for satellite communication
Description
Module Configuration Register
MCR
Global configuration for all channels
Channel Configuration Registers
CCR1
CCR2
CCR3
CCR4
Used to configure individual channels and
receive
satellite information
Internal pointer incremented to each channel
register
Status Register
SR
Status of channels
Channel leakage to ground/battery/open faults
Message faults (Start bits, Other)



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