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L9662 데이터시트(PDF) 23 Page - STMicroelectronics |
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L9662 데이터시트(HTML) 23 Page - STMicroelectronics |
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23 / 80 page ![]() DocID028325 Rev 1 23/80 L9662 Electrical specifications 79 Figure 3. Sync pulse diagram tHVILIMDLY HV current limit active time following tSYNC_highx Guaranteed by design - - 12 μs CICHX Capacitance on satellite output for stability (per pin) ICHx pin to CICHX 70nH; 10 - 47 nF INITSYNC input VINITSYNCLO Input low voltage threshold - 0 - 0.8 V VINITSYNCHI Input high voltage threshold - 2.0 - 1.0 x VDD V IISPD Input pulldown current INITSYNC VIN = VIL to VDD 10 - 50 A TINITSYNCFLT Minimum pulse width - 1.7 - 2.1 s Table 8. Satellite interface - DC electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit |
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