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VD5377 데이터시트(PDF) 59 Page - STMicroelectronics

부품명 VD5377
상세설명  Ultra-low power motion sensor for optical finger navigation (OFN)
PDF  88 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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VD5377 데이터시트(HTML) 59 Page - STMicroelectronics

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VD5377
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In this mode, the pins BK0, BK1, BK2 and I2C_SEL0 are used for serial output of video data
in the form of 2 bits nibble + FST and QCLK.
Upon receipt of an FST (BK2) rising edge, NIB_EVEN (BK0) and NIB_ODD (BK1) output
data every 48 MHz clock cycle. The signals should be sampled the first rising CLK
(I2C_SEL0) edge after the FST rising edge, and then every rising CLK edge after that during
the 1600 cycles (400 x 4).
Groups of four consecutive NIB_EVEN and NIB_ODD must then be repackaged together to
form a single 8-bit pixel data. This format enables the pixels to be output at the same frame
rate as normal operation, and keeps I2C available to access the usual register settings.
Table 33. Fast capture
Addr
(Hex)
Register name
SIgnal name
Bit
Type
Default
(Hex)
Comment
5
SYSTEM_CONFIG
automatic_power_
mode
0PRW
01
Power mode scheme
0 = Manual
1 = Automatic
motion_pin_polarity
2
PRW
00
MOTION pin polarity (in non
IDLE system state)
0 = MOTION pin LOW when
motion detected
1 = MOTION pin HIGH when
motion detected
host_config_done
3
PRW
00
Bit needs to be set by host
when configured after power
up.
use_standby_pin
4
PRW
01
STANDBY pin is used as
chip select to enable I2C in
AUTO power mode and
STANDBY pin is used to
wake up the OSC/DVREG
(in sleep states in auto
power mode).
0 = STANDBY pin not used
1 = STANDBY pin is used
system_state
7:5
RW
01
Legacy register - please use
system_state (0x91)
instead.
15
CLOCKS_LO
clk_motion_timer
1
PRW
00
Timer clock enabled (forced
always on)
clk_pci_en
4
PRW
00
PCI clock enable (forced
always on)
59
FRAMEDUMP_CTRL pci_test_enable
4
PRW
00
Muxed PCI data onto pads
(2 bits nibble + FST + Qclk)
0 = Disable
1 = Enable



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