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RF430CL331HIPWR 데이터시트(PDF) 5 Page - Texas Instruments |
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RF430CL331HIPWR 데이터시트(HTML) 5 Page - Texas Instruments |
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5 / 60 page ![]() RF430CL331H www.ti.com SLASE18A – SEPTEMBER 2015 – REVISED NOVEMBER 2015 3.2 Pin Attributes Table 3-1. Pin Attributes PIN NUMBER SIGNAL NAME SIGNAL TYPE (1) BUFFER TYPE (2) POWER SOURCE RESET STATE (3) PW RGT 1 15 VCC PWR Power VCC N/A 2 1 ANT1 RF Analog – N/A 3 2 ANT2 RF Analog – N/A 4 3 RST I LVCMOS VCC PU 5 4 E0 I LVCMOS VCC OFF 6 5 E1 I LVCMOS VCC OFF 7 6 E2 I LVCMOS VCC OFF 8 7 INTO O LVCMOS VCC OFF 9 8 I2C_READY O LVCMOS VCC DRIVE1 10 9 I2C_SIGNAL O LVCMOS VCC DRIVE1 11 10 SCL I/O LVCMOS VCC OFF 12 11 SDA I/O LVCMOS VCC OFF 13 12 VCORE PWR Power VCC N/A 14 13 VSS PWR Power VCC N/A – 14 NC – – – – – 16 NC – – – – (1) Signal Types: I = Input, O = Output, I/O = Input or Output, PWR = Power, RF = Radio frequency (2) Buffer Types: See Table 3-3 for details. (3) Reset States: OFF = High-impedance input with pullup or pulldown disabled (if available) PD = High-impedance input with pulldown enabled PU = High-impedance input with pullup enabled DRIVE0 = Drive output low DRIVE1 = Drive output high N/A = Not applicable Copyright © 2015, Texas Instruments Incorporated Terminal Configuration and Functions 5 Submit Documentation Feedback Product Folder Links: RF430CL331H |
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