AD6635BBSLASHPCB datasheet(48/60 Pages) AD

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AD6635

Table XV. Memory Map for Output Port Control Registers (continued)

Channel Address (hex)

Bit Width

Comments

4: Clipping Error

1Maintain level of clipping error

0Maintain output signal level

3: Sync Now

2: Init on Sync

1: First Sync Only

0: Bypass

AGC A Hold Off Counter

15–0: Holdoff Value

AGC A Desired Level

7–0: Desired Output Power Level or Clipping Energy

(R Parameter)

AGC A Signal Gain

11–0: Gs Parameter

AGC A Loop Gain

7–0: K Parameter

AGC A Pole Location

7–0: P Parameter

AGC A Average Samples

5–2: Scale for CIC Decimator

1–0: Number of Averaging Samples

AGC A Update Decimation

11–0: CIC Decimation Ratio

AGC B Control Register

7–5: Output Word Length

111

4 bits

110

5 bits

101

6 bits

100

7 bits

011

8 bits

010

10 bits

001

12 bits

000

16 bits

4: Clipping Error

1Maintain level of clipping error

0Maintain output signal level

3: Sync Now

2: Init on Sync

1: First Sync Only

0: Bypass

AGC B Hold Off Counter

15–0: Holdoff Value

AGC B Desired Level

7–0: Desired Output Power Level or Clipping Energy

(R Parameter)

AGC B Signal Gain

11–0: Gs Parameter

AGC B Loop Gain

7–0: K Parameter

AGC B Pole Location

7–0: P Parameter

AGC B Average Samples

5–2: Scale for CIC Decimator

1–0: Number of Averaging Samples

AGC B Update Decimation

11–0: CIC Decimation

Parallel A Control

7–6: Reserved

5: Parallel Port Data Format

1: 8-Bit Parallel I, Q

0: 16-Bit Interleaved I, Q

4: Channel 3

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