STA400A datasheet(27/117 Pages) STMICROELECTRONICS

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STA400A

2REGISTER MAP

Table 1. Register Classes

pr:

Event counter. (increments if input =1 and will be reset after read access to preset value)

pri:

Event counter like pr-register, plus trigger output signal if maximum is arrived.

wrt: Write and read register plus trigger output signal when write access.

rt:

Read only register plus trigger output signal when read access.

int:

This register class always consists out of a status and mask register. The status register stores interrupt

signals from CDEC. The mask registers determines if an interrupt signal should generate an irq_out signal

or not.

trt:

A transparent register does not exists physically in the register map. The register map pipelines the

information to the CDEC register. The register operates as a normal write/read register in the register

map.

Note:The pr and rt register classes must be read with the random address read mode only. Sequential read

mode is not allowed.

Table 2. Base Address List

Abbreviations

Name of Register Class

write and read

read

read plus en-trigger

preset when read

pri

preset when read plus trigger signal

wrt

write and read plus trigger signal

int

interrupt register pair

trt

transparent

Base Address (hex)

Block

Satellite Demodulators (SatDem1 + SatDem2)

Terrestrial Demodulator (Section 1)

TDM (Section 1)

FEC

IF Sampling and Control Interface

PC Bitstream Interface

TDM (Section 2)

Terrestrial Demodulator (Section 2)

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