LP8501 datasheet(37/51 Pages) TI1

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LP8501

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SNVS548D – SEPTEMBER 2008 – REVISED AUGUST 2013

–

10 = run program as defined by ENGINE3_EXEC bits

–

11 = halt, halts program execution. Current command execution stopped

•

Note that changing mode from Run to Load is not allowed. Preferred sequence is 10 –> 00 –> 01.

02 GROUP 1 FADING

•

This is the register used to assign fade-in and fade-out times for group 1. Time can be set with 4 bits.

•

02 — Bits [7:4] FADE_IN

•

02 — Bits [3:0] FADE_OUT

FADE_IN/FADE_OUT

Time, s

0000

0.0

0001

0.05

0010

0.1

0011

0.2

0100

0.3

0101

0.4

0110

0.5

0111

0.6

1000

0.7

1001

0.8

1010

0.9

1011

1.0

1100

1.5

1101

2.0

1110

3.0

1111

4.0

03 GROUP 2 FADING

•

See GROUP 1 FADING

04 GROUP 3 FADING

•

See GROUP 1 FADING

05 POWER CONFIG

•

05 — Bit [0] CHP_CON_7_9

–

1 = VDD7_9 should be connected to VOUT

–

0 = VDD7_9 should be connected to VDD

•

05 — Bit [1] CHP_CON_1_6

–

1 = VDD1_6 should be connected to VOUT

–

0 = VDD1_6 should be connected to VDD

06 D1 CONTROL

•

This is the register used to assign the D1 output to the GROUP FADER group 1, 2, or 3, or none of them.

This register selects between linear and logarithmic PWM brightness adjustment. By using logarithmic PWM

scale the visual effect looks like linear. Logarithmic adjustment converts internally an 8-bit PWM value to a

logarithmic 12-bit value.

•

06 — Bit [7:6] GROUP_SELECT

–

00 = No group fader set, clears group fader set for D1. Default setting.

–

01 = Fader group 1 controls the D1 driver. The user can set the overall output of the group by the GROUP

1 FADER register at the address 48h and the fade-in/fade-out time by the GROUP 1 FADING register at

the address 02h.

–

10 = Fader group 2 controls the D1 driver. The user can set the overall output of the group by the GROUP

2 FADER register at the address 49h and the fade-in/fade-out time by the GROUP 2 FADING register at

the address 03h.

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