P89LPC932BA datasheet(41/60 Pages) PHILIPS

41 / 60 page

Philips Semiconductors

P89LPC932

8-bit microcontroller with accelerated two-clock 80C51 core

Product data

Rev. 04 — 06 January 2004

41 of 60

9397 750 12379

8.26 Data EEPROM

The P89LPC932 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is

SFR based, byte readable, byte writable, and erasable (via row ﬁll and sector ﬁll). The

user can read, write and ﬁll the memory via SFRs and one interrupt. This Data

EEPROM provides 100,000 minimum erase/program cycles for each byte.

• Byte Mode: In this mode, data can be read and written one byte at a time.

• Row Fill: In this mode, the addressed row (64 bytes) is ﬁlled with a single value.

The entire row can be erased by writing 00h.

• Sector Fill: In this mode, all 512 bytes are ﬁlled with a single value. The entire

sector can be erased by writing 00h.

After the operation ﬁnishes, the hardware will set the EEIF bit, which if enabled will

generate an interrupt. The ﬂag is cleared by software.

8.27 Flash program memory

8.27.1

General description

The P89LPC932 Flash memory provides in-circuit electrical erasure and

programming. The Flash can be read, erased, or written as bytes. The Sector and

Page Erase functions can erase any Flash sector (1 kB) or page (64 bytes). The Chip

Erase operation will erase the entire program memory. In-System Programming and

standard parallel programming are both available. On-chip erase and write timing

generation contribute to a user-friendly programming interface. The P89LPC932

Flash reliably stores memory contents even after 10,000 erase and program cycles.

The cell is designed to optimize the erase and programming mechanisms. The

P89LPC932 uses VDD as the supply voltage to perform the Program/Erase

algorithms.

8.27.2

Features

• Internal ﬁxed boot ROM, containing low-level In-Application Programming (IAP)

routines

• User programs can call these routines to perform In-Application Programming

(IAP).

• Default loader providing In-System Programming via the serial port, located in

upper end of user program memory.

• Boot vector allows user-provided Flash loader code to reside anywhere in the

Flash memory space, providing ﬂexibility to the user.

• Programming and erase over the full operating voltage range.

• Read/Programming/Erase using ISP/IAP.

• Any ﬂash program/erase operation in 2 ms.

• Parallel programming with industry-standard commercial programmers.

• Programmable security for the code in the Flash for each sector.

• 100,000 typical erase/program cycles for each byte.

• 10 year minimum data retention.

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