P89LPC932BA datasheet(28/60 Pages) PHILIPS

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Philips Semiconductors

P89LPC932

8-bit microcontroller with accelerated two-clock 80C51 core

Product data

Rev. 04 — 06 January 2004

28 of 60

9397 750 12379

8.18.4

Output compare

There are four output compare channels A, B, C and D. Each output compare

channel needs to be enabled in order to operate and the user will have to set the

associated I/O pin to the desired output mode to connect the pin. When the contents

of the timer matches that of a capture compare control register, the Timer Output

Compare Interrupt Flag (TOCFx) becomes set. An interrupt will occur if enabled.

8.18.5

Input capture

Input capture is always enabled. Each time a capture event occurs on one of the two

input capture pins, the contents of the timer is transferred to the corresponding 16-bit

input capture register. The capture event can be programmed to be either rising or

falling edge triggered. A simple noise ﬁlter can be enabled on the input capture by

enabling the Input Capture Noise Filter bit. If set, the capture logic needs to see four

consecutive samples of the same value in order to recognize an edge as a capture

event. An event counter can be set to delay a capture by a number of capture events.

8.18.6

PWM operation

PWM operation has two main modes, symmetrical and asymmetrical.

In asymmetrical PWM operation the CCU Timer operates in downcounting mode

regardless of the direction control bit.

In symmetrical mode, the timer counts up/down alternately. The main difference from

basic timer operation is the operation of the compare module, which in PWM mode is

used for PWM waveform generation.

As with basic timer operation, when the PWM (compare) pins are connected to the

compare logic, their logic state remains unchanged. However, since bit FCO is used

to hold the halt value, only a compare event can change the state of the pin.

Fig 8.

Asymmetrical PWM, downcounting.

TOR2

COMPARE VALUE

TIMER VALUE

NON-INVERTED

INVERTED

0x0000

002aaa534

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