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TNETV1002IDZHK 데이터시트(PDF) 93 Page - Texas Instruments |
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TNETV1002IDZHK 데이터시트(HTML) 93 Page - Texas Instruments |
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93 / 102 page ![]() Electrical Specifications 83 June 2001 -- Revised December 2002 SPRS180C B C A 1 5 2 11 10 13 3 ARM_MCLK ADD[22:0] DATA[31:0] R/W CSn BE[3:0] OE 6 8 9 12 7 4 14 E‡ E† † n=0wait states ‡ n=1or morewait states NOTE: When performing a 32-bit access on a 16-bit-wide SRAM, two of the byte-enables will be active at the same time. The particular byte-enables active depend on the endiannism selected. Figure 6--36. ARM SRAM Read Timing |
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