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M38B53M4-059FP 데이터시트(PDF) 338 Page - Mitsubishi Electric Semiconductor

부품명 M38B53M4-059FP
상세설명  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  355 Pages
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제조업체  MITSUBISHI [Mitsubishi Electric Semiconductor]
홈페이지  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M38B53M4-059FP 데이터시트(HTML) 338 Page - Mitsubishi Electric Semiconductor

Back Button M38B53M4-059FP Datasheet HTML 334Page - Mitsubishi Electric Semiconductor M38B53M4-059FP Datasheet HTML 335Page - Mitsubishi Electric Semiconductor M38B53M4-059FP Datasheet HTML 336Page - Mitsubishi Electric Semiconductor M38B53M4-059FP Datasheet HTML 337Page - Mitsubishi Electric Semiconductor M38B53M4-059FP Datasheet HTML 338Page - Mitsubishi Electric Semiconductor M38B53M4-059FP Datasheet HTML 339Page - Mitsubishi Electric Semiconductor M38B53M4-059FP Datasheet HTML 340Page - Mitsubishi Electric Semiconductor M38B53M4-059FP Datasheet HTML 341Page - Mitsubishi Electric Semiconductor M38B53M4-059FP Datasheet HTML 342Page - Mitsubishi Electric Semiconductor Next Button
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Addition
Subtraction
Multiplication
Division
Logical OR
Logical AND
Logical exclusive OR
Negation
Shows direction of data flow
Index register X
Index register Y
Stack pointer
Program counter
Processor status register
8 high-order bits of program counter
8 low-order bits of program counter
8 high-order bits of address
8 low-order bits of address
FF in Hexadecimal notation
Immediate value
Zero page address
Memory specified by address designation of any ad-
dressing mode
Memory of address indicated by contents of index
register X
Memory of address indicated by contents of stack
pointer
Contents of memory at address indicated by ADH and
ADL, in ADH is 8 high-order bits and ADL is 8 low-or-
der bits.
Contents of address indicated by zero page ADL
Bit i (i = 0 to 7) of accumulator
Bit i (i = 0 to 7) of memory
Opcode
Number of cycles
Number of bytes
Implied addressing mode
Immediate addressing mode
Accumulator or Accumulator addressing mode
Accumulator bit addressing mode
Accumulator bit relative addressing mode
Zero page addressing mode
Zero page bit addressing mode
Zero page bit relative addressing mode
Zero page X addressing mode
Zero page Y addressing mode
Absolute addressing mode
Absolute X addressing mode
Absolute Y addressing mode
Indirect absolute addressing mode
Zero page indirect absolute addressing mode
Indirect X addressing mode
Indirect Y addressing mode
Relative addressing mode
Special page addressing mode
Carry flag
Zero flag
Interrupt disable flag
Decimal mode flag
Break flag
X-modified arithmetic mode flag
Overflow flag
Negative flag
IMP
IMM
A
BIT, A
BIT, A, R
ZP
BIT, ZP
BIT, ZP, R
ZP, X
ZP, Y
ABS
ABS, X
ABS, Y
IND
ZP, IND
IND, X
IND, Y
REL
SP
C
Z
I
D
B
T
V
N
Symbol
Contents
Symbol
Contents
+
–
V
/
V
V
–
–
←
X
Y
S
PC
PS
PCH
PCL
ADH
ADL
FF
nn
zz
M
M(X)
M(S)
M(ADH, ADL)
M(00, ADL)
Ai
Mi
OP
n
#
3-90
APPENDIX
38B5 Group User's Manual
3.11 Machine instructions



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