DS3134 datasheet(63/203 Pages) DALLAS

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DS3134

63 of 203

C[n]DAT[j] where n = 0 to 15 for each Port & j = 0 to 127 for each DS0

Indirect Access Via CP[n]RD

5432

RDATA(8): Receive DS0 Data

TDATA(8): Transmit DS0 Data

Note: Bits that are underlined are read only, all other bits are read-write.

Note: In normal device operation, the Host must never write to the C[n]DAT[j] registers.

Bits 0 to 7 / Receive DS0 Data (RDATA). This register holds the most current DS0 byte received. It is

used by the transmit side Layer One State Machine when Channelized Network LoopBack (CNLB) is

enabled.

Bits 8 to 15 / Transmit DS0 Data (TDATA). This register holds the most current DS0 byte transmitted.

It is used by the receive side Layer One State Machine when Channelized Local LoopBack (CLLB) is

enabled.

R[n]CFG[j] where n = 0 to 15 for each Port & j = 0 to 127 for each DS0

Indirect Access via CP[n]RD

5432

RCH#(8): Receive HDLC Channel Number

RCHEN

RBERT

n/a

RV54

n/a

CLLB

n/a

R56

Note: Bits that are underlined are read only, all other bits are read-write.

Bits 0 to 7 / Receive Channel Number (RCH#). The CPU will load the number of the HDLC channel

associated with this particular DS0 channel. If the port is running in an unchannelized mode (RUEN = 1),

then the HDLC Channel Number only needs to be loaded into R[n]CFG0. If the Fast (52 Mbps) HDLC

Engine is enabled on Port 0, then HDLC Channel 1 is assigned to it and likewise HDLC Channel 2 will

be assigned to the Fast HDLC Engine on Port 2 if it is enabled. Hence, these HDLC channel numbers

should not be used if the Fast HDLC Engines are enabled.

00000000 (00h) = HDLC Channel Number 1 (also used for the Fast HDLC Engine on Port 0)

00000001 (01h) = HDLC Channel Number 2 (also used for the Fast HDLC Engine on Port 1)

00000010 (02h) = HDLC Channel Number 3

11111111 (FFh) = HDLC Channel Number 256

DS3134 데이터시트(PDF) 63 Page - Dallas Semiconductor