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MCP3918A1-E/ML 데이터시트(PDF) 57 Page - Microchip Technology

부품명 MCP3918A1-E/ML
상세설명  3V Single-Channel Analog Front End
PDF  88 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP3918A1-E/ML 데이터시트(HTML) 57 Page - Microchip Technology

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 2014 Microchip Technology Inc.
DS20005287A-page 57
MCP3918
FIGURE 7-2:
Frame Word.
These four frames can be used to multiplex SDO at the
output of the digital isolators. In this case, up to
four channels (typically three phases and one neutral
for energy metering applications) can be multiplexed.
The output data of each individual MCP3918 device
can be attributed to a different frame (FRAME0, 1, 2 or
3), and retrieved on a single SDO line after the digital
isolators, provided that the isolators have a chip enable
or a multiplexing feature. The frame counter can then
be used to retrieve the information about which
MCP3918 part is actually being read. After the four
frames have been transmitted, the SDO pin idles logic
low to reduce digital isolator power consumption until
the next data is available. Figure 7-3 displays the
timing diagram for the 2-Wire Interface mode, showing
all OSR possibilities. Note that the first set of frames is
sent only when the first data is ready, which means that
the settling time of the sinc filter will be elapsed before
sending the first set of frames, as represented in
Figure 7-3.
FIGURE 7-3:
MCP3918 2-Wire Communication Protocol.
CRCCOM<15:0>
DATA_CH0<23:0>
SYNC WORD (2 Bytes)
SDO OUTPUT FRAME (7 Bytes, 56x clocks per Frame)
CHANNEL 0 ADC DATA (3 Bytes)
SDO
SCK/
MCLK
CRCCOM<15:0>
CRCCOM on Entire Frame (2 Bytes)
DATA_CH0<15:0>
SYNC WORD (2 Bytes)
SDO OUTPUT FRAME (6 Bytes, 48x clocks per Frame)
CHANNEL 0 ADC DATA (2 Bytes)
SDO
SCK/
MCLK
FRAME CLOCKING FOR OSR>64
FRAME CLOCKING FOR OSR=64
CRCCOM on Entire Frame (2 Bytes)
TABLE 7-4:
FRAME COUNTER SETTINGS
CNT1
CNT0
FRAME NUMBER
00
FRAME0
01
FRAME1
10
FRAME2
11
FRAME3
SDO
(OSR=64)
00
Internal data ready (Data is
unsettled). No frame is transmitted
Data Ready.
New data is available
OSC2/
MODE
256x
clocks
256x
clocks
256x
clocks
SCK/MCLK
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
256x
clocks
DATA=D1
DATA=D2 DATA=D3
DATA=D4
DATA=0
DATA=D5
DATA=D6
DATA=D7
DATA=D8
DATA=D9
DATA=D10 DATA=D11 DATA=D12 DATA=D13 DATA=D14 DATA=D15 DATA=D16 DATA=D17 DATA=D18 DATA=D19 DATA=D20 DATA=D21 DATA=D22
0
DATA=D1
DATA=D2
DATA=D3
DATA=D4
DATA=D5
DATA=D6
DATA=D7
DATA=D8
DATA=D9
DATA=D10
0
DATA=D1
DATA=D2
DATA=D3
DATA=D4
0
DATA=D1
0
0
0
0
0
00
0
0
00
0
0
0
0
00
0
2-Wire Mode
Hi-Z
Hi-Z
Hi-Z
Hi-Z
SDO
(OSR=128)
SDO
(OSR=256)
SDO
(OSR=512)
0
0
0
0



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