OV7620 datasheet(4/60 Pages) ETC

4 / 60 page

OV7620 Product Specifications - Rev. 1.2 (5/13/00)

OMNIVISION TECHNOLOGIES INC.

Preliminary Company Confidential

1.2 Pin Assignments

Table 1:Pin Descriptions(Pin type and default level: I-1: digital input+10k pull up; I-0: digital input +10k pull

down, XI/XO; xtal IO; /Secondary functions are set during power up; O/I: digital CMOS level output Bias: power

supply bias.).

Pin #

Name

Class

Function

SVDD

Bias

Sensing Power (+5V) pins.

8, 14,44

AVDD

Bias

Analog Power (+5V) pins.

DVDD

Bias

Digital Power (+5V) pins.

DOVDD

Bias

Digital I/O Power (+5V / +3.3V) pins.

SGND

Bias

Sensing ground connections. Connect to supply common

6, 7, 15, 43

AGND

Bias

Analog ground connections. Connect to supply common

DGND

Bias

Digital ground connection. Connect to supply common

DOGND

Bias

Digital Output ground connection.

RESET

Chip reset, “high” active.

AGCEN/RAMINT

I-I

AGCEN =1 enables the Auto Gain Control. AGCEN = 0 disables it.

This pin setting is effective when pin SBB = 1.

RAMINT=1 initializes frame transfer.

FREX

Frame exposure control input, effective in progressive scan only.

The positive width of FREX defines the exposure time.

VrEQ

CAP

Internal voltage reference. Requires an 0.1uF decoupling capacitor

to ground.

PWDN

I-0

PWDN =1 puts chip in power down (sleep) mode.

VrS

CAP

Internal voltage reference. Requires an 0.1uF decoupling capacitor

to ground.

VcCHG

CAP

Internal voltage reference. Requires an 1.0uF decoupling capacitor

to ground.

SBB

SBB = 1 selects the power-up method of programming the internal

functions. SBB = 0 selects the SCCB pin programming method.

Results of the power-up method can only be changed by a new

power-up or reset sequence.

VTO

Video Test Output (NTSC)

VSYNC/CSYS

O/I

VSYNC: Vertical sync output. This pin is asserted high during sev-

eral scan lines in the vertical sync period.

CSYS: Composite Sync. When not using SCCB, a 10k pull up

changes pin 42(CHSYNC) to CSYS.

FODD/SRAM

O/I

FODD: Odd field flag. Asserted high during the odd field, low during

the even field.

SRAM: External SRAM

HREF/VSFRAM

O/I

HREF: Horizontal window reference output. HREF is high during the

active pixel window, otherwise low.

VSFRAM: Vertical Sync Frame.

UV7/B8

O/I

UV7: Digital output UV bus. UV7 used for 16-bit operation for out-

putting chrominance data.

B8: Switch for 8 bit mode luminance/Chroma tristate. Default is 16

bit mode.

UV6/BPCLR

O/I

UV6: Digital output UV bus. UV6 used for 16-bit operation for out-

putting chrominance data.

BPCLR: Bypass RGB color matrix.

UV5/MIR

O/I

UV5: Digital output UV bus. UV5 used for 16-bit operation for out-

putting chrominance data.

MIR: Mirror.

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