STM32F058C8 datasheet(13/104 Pages) STMICROELECTRONICS

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STM32F058C8 STM32F058R8 STM32F058T8

Functional overview

3.4

Cyclic redundancy check calculation unit (CRC)

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit

data word and a CRC-32 (Ethernet) polynomial.

Among other applications, CRC-based techniques are used to verify data transmission or

storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of

verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of

the software during runtime, to be compared with a reference signature generated at link-

time and stored at a given memory location.

3.5

Power management

3.5.1

Power supply schemes

•

VDD = VDDIO1 = 1.8 V ± 8%: external power supply for I/Os (VDDIO1) and digital logic. It

is provided externally through VDD pins.

•

VDDA = from VDD to 3.6 V: external analog power supply for ADC, DAC, RCs and PLL

(minimum voltage to be applied to VDDA is 2.4 V when the ADC or DAC are used). It is

provided externally through VDDA pin. The VDDA voltage level must be always greater

or equal to the VDD voltage level and must be established first.

•

VBAT = 1.65 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and

backup registers (through power switch) when VDD is not present.

For more details on how to connect power pins, refer to Figure 10: Power supply scheme.

3.5.2

Power-on reset

To guarantee a proper power-on reset, the NPOR pin must be held low until VDD is stable.

When VDD is stable, the reset state can be exited either by:

•

putting the NPOR pin in high impedance (NPOR pin has an internal pull-up), or by

•

forcing the pin to high level by connecting it to VDDA

3.5.3

Low-power modes

The STM32F058C8/R8/T8 microcontrollers support two low-power modes to achieve the

best compromise between low power consumption, short startup time and available wakeup

sources:

•

Sleep mode

In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can

wake up the CPU when an interrupt/event occurs.

•

Stop mode

Stop mode achieves very low power consumption while retaining the content of SRAM

and registers. All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC and the

HSE crystal oscillators are disabled.

The device can be woken up from Stop mode by any of the EXTI lines. The EXTI line

source can be one of the 16 external lines, RTC, I2C1 USART1, COMPx or the CEC.

The CEC, USART1 and I2C1 peripherals can be configured to enable the HSI RC

oscillator so as to get clock for processing incoming data.

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