BLUENRG-1 datasheet(39/173 Pages) STMICROELECTRONICS

39 / 173 page

BlueNRG-1

Functional details

DocID028866 Rev 1

39/173

Source

port

width

Destination

port width

Number of

data items

to transfer

(NDT)

Source

content:

address/data

Transfer operations

Destination

content:

address/data

@0x8 /

BBBAB9B8

3: READ

BBBAB9B8[31:0]

@0x8 then WRITE

B0[7:0] @0x2

@0x2 / B8

@0xC /

BFBEBDBC

4: READ

BFBEBDBC[31:0]

@0xC then WRITE

B0[7:0] @0x3

@0x3 / BC

@0x0 /

B3B2B1B0

1: READ

B3B2B1B0[31:0]

@0x0 then WRITE

B1B0[15:0] @0x0

@0x0 / B1B0

@0x4 /

B7B6B5B4

2: READ

B7B6B5B4[31:0]

@0x4 then WRITE

B3B2[15:0] @0x2

@0x2 / B5B4

@0x8 /

BBBAB9B8

3: READ

BBBAB9B8[31:0]

@0x8 then WRITE

B5B4[15:0] @0x4

@0x4 / B9B8

@0xC /

BFBEBDBC

4: READ

BFBEBDBC[31:0]

@0xC then WRITE

B7B6[15:0] @0x6

@0x6 / BDBC

@0x0 /

B3B2B1B0

1: READ

B3B2B1B0[31:0]

@0x0 then WRITE

0000B1B0[31:0]

@0x0

@0x0 /

B3B2B1B0

@0x4 /

B7B6B5B4

2: READ

B7B6B5B4[31:0]

@0x4 then WRITE

0000B3B2[31:0]

@0x4

@0x4 /

B7B6B5B4

@0x8 /

BBBAB9B8

3: READ

BBBAB9B8[31:0]

@0x8 then WRITE

0000B5B4[31:0]

@0x8

@0x8 /

BBBAB9B8

@0xC /

BFBEBDBC

4: READ

BFBEBDBC[31:0]

@0xC then WRITE

0000B7B6[31:0]

@0xC

@0xC /

BFBEBDBC

The DMA is addressed through AHB and can be accessed only with 32-bit access. Any 8-

bit or 16-bit access will generate a hard fault.

When the DMA initiates an AHB byte or halfword write operation, the data are duplicated

on the unused lanes of the HWDATA[31:0] bus. So when the used AHB slave peripheral

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