USB3250

DS00002142A-page 26

7.6

FS/HS RX

The receivers connect directly to the USB cable. The block contains a separate differential receiver for HS and FS mode.

Depending on the mode, the selected receiver provides the serial data stream through the multiplexer to the RX Logic

block. The FS mode section of the FS/HS RX block also consists of a single-ended receiver on each of the data lines

to determine the correct FS LINESTATE. For HS mode support, the FS/HS RX block contains a squelch circuit to insure

that noise is never interpreted as data.

7.7

FS/HS TX

The transmitters connect directly to the USB cable. The block contains a separate differential FS and HS transmitter

which receive encoded, bitstuffed, serialized data from the TX Logic block and transmit it on the USB cable. The FS/HS

TX block also contains circuitry that either enables or disables the pull-up resistor on the D+ line.

7.8

Biasing

This block consists of an internal bandgap reference circuit used for generating the driver current and the biasing of the

analog circuits. This block requires an external precision resistor (12k

+/- 1% from the RBIAS pin to analog ground).

7.9

Power Control

This is the block that receives and distributes all the power for the transceiver. This block is also responsible for handling

ESD protection.

FIGURE 7-12:

RECEIVE TIMING FOR DATA PACKET WITH CRC-16 (8-BIT MODE)

SYNC

EOP

PID

DATA

CRC-16 Computation

CRC

CRC

CLK60

RXACTIVE

RXDATA[7:0]

RXVALID

RXERROR

DP/DM

DATA

DATA

DATA

PID

DATA

CRC

CRC

DATA

DATA

DATA