USB3250

DS00002142A-page 38

8.14

Application Diagram

The bypass capacitors shown Figure 8-9 for the voltage regulator are typical values. The actual values will be dictated

by the regulator used in the end application. Please refer to the layout application note for recommendations regarding

critical component placement.

FIGURE 8-8:

DEVICE ATTACH BEHAVIOR

TABLE 8-10:

ATTACH AND RESET TIMING VALUES

Timing Parameter

Description

Value

T0

Vbus Valid.

0 (reference)

T1

Maximum time from Vbus valid to when the device

must signal attach.

T0 + 100ms < T1

T2 (HS Reset T0)

Debounce interval. The device now enters the HS

Detection Handshake protocol.

T1 + 100ms < T2

Device Reset

Idle (FS 'J')

XCVRSELECT

DP/DM

TERMSELECT

T2

SE0

T0

time

HS Detection

Handshake

V

BUS

T1