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MLX71122

300 to 930MHz FSK/FM/ASK Receiver

Datasheet

REVISION 014 – AUGUST, 2016

Page 6 of 59

390 10 71122 01

1. Theory of Operation

1.1. General

The MLX71122 receiver architecture is based on a double-conversion super-heterodyne approach. The two

LO signals are derived from an on-chip integer-N PLL frequency synthesizer. The PLL reference frequency is

derived from a crystal (XTAL). The PLL synthesizer consists of an integrated voltage-controlled oscillator

with external inductor, a programmable feedback divider chain, a programmable reference divider, a

phase-frequency detector with a charge pump and an external loop filter.

In the receiver’s down-conversion chain, two mixers MIX1 and MIX2 are driven by the internal local

oscillator signals LO1 and LO2, respectively. The second mixer MIX2 is an image-reject mixer. As the first

intermediate frequency (IF1) is very high (typically above 100 MHz), a reasonably high degree of image

rejection is provided even without using an RF front-end filter. At applications asking for very high image

rejections, cost-efficient RF front-end filtering can be realized by using a SAW filter in front of the LNA.

The receiver signal chain is set up by a low noise amplifier (LNA), two down-conversion mixers (MIX1 and

MIX2), an on-chip IF filter (IFF) as well as an IF amplifier (IFA). By choosing the required modulation via an

FSK/ASK switch (at pin MODSEL), either the on-chip FSK demodulator (FSK DEMOD) or the RSSI-based ASK

detector is selected. A second order data filter (OA1) and a data slicer (OA2) follow the demodulator. The

data slicer threshold can be generated from the mean-value of the data stream or by means of the positive

and negative peak detectors (PKDET+/-).

In general the MLX71122 can be set to shut-down mode, where all receiver functions are completely

turned off, and to several other operating modes. There are two global operating modes that are

selectable via the logic level at pin SPISEL:

 8-channel pre-configured mode (ABC mode)

 fully programmable mode (SPI mode).

In ABC mode the number of frequency channels is limited to eight but no microcontroller programming is

required. In this case the three lines of the serial programming interface (SPI) are used to select one of the

eight predefined frequency channels via simple 3-bit parallel programming. Pins ENRX and MODSEL are

used to enable/disable the receiver and to select FSK or ASK demodulation, respectively.

SPI mode is recommended for full programming flexibility. In this case the three lines of the SPI are

configured as a standard 3-wire bus (SDEN, SDTA and SCLK). This allows changing many parameters of the

receiver, for example more operating modes, channels, frequency resolutions, gains, demodulation types,

data slicer settings and more. The pin MODSEL has no effect in this mode.

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