MLX71122_16 datasheet(21/59 Pages) MELEXIS

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MLX71122

300 to 930MHz FSK/FM/ASK Receiver

Datasheet

REVISION 014 – AUGUST, 2016

Page 21 of 59

390 10 71122 01

3.2. PLL Frequency Synthesizer

The MLX71122 contains an integer-N PLL frequency synthesizer. The reference frequency fR is derived from

a stable crystal reference oscillator.

Fig. 4:

Integer-N PLL Frequency Synthesizer Topology

The locked state of the PLL is defined by the following relations:

VCO

tot

VCO

PFD







(14)

In this formula the total PLL feedback divider ratio is called Ntot. The synthesized output frequency fVCO can

be changed by reprogramming the reference divider or the feedback divider according to





tot

VCO







(15)

The R counter is used to set the channel spacing. Different channels can be selected by changing the total

feedback divider ratio.

Reference

Oscillator

Reference

Divider

Phase-Frequency

Detector

Charge

Pump

VCO

Voltage Controlled

Oscillator

External

Loop Filter

Feedback

Divider

VCC

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