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MB95F613H 데이터시트(PDF) 21 Page - Cypress Semiconductor

부품명 MB95F613H
상세설명  F2MC-8FX CPU core
PDF  110 Pages
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB95F613H 데이터시트(HTML) 21 Page - Cypress Semiconductor

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Document Number: 002-04698 Rev. *A
Page 21 of 110
PRELIMINARY
MB95610H Series
8. Notes on Device Handling
Preventing latch-ups
When using the device, ensure that the voltage applied does not exceed the maximum voltage rating.
In a CMOS IC, if a voltage higher than VCC or a voltage lower than VSS is applied to an input/output pin that is neither a
medium-withstand voltage pin nor a high-withstand voltage pin, or if a voltage out of the rating range of power supply voltage mentioned
in “18.1 Absolute Maximum Ratings” of “Electrical Characteristics” is applied to the VCC pin or the VSS pin, a latch-up may occur.
When a latch-up occurs, power supply current increases significantly, which may cause a component to be thermally destroyed.
Stabilizing supply voltage
Supply voltage must be stabilized.
A malfunction may occur when power supply voltage fluctuates rapidly even though the fluctuation is within the guaranteed operating
range of the VCC power supply voltage.
As a rule of voltage stabilization, suppress voltage fluctuation so that the fluctuation in VCC ripple (p-p value) at the commercial
frequency (50 Hz/60 Hz) does not exceed 10% of the standard VCC value, and the transient fluctuation rate does not exceed 0.1 V/ms
at a momentary fluctuation such as switching the power supply.
Notes on using the external clock
When an external clock is used, oscillation stabilization wait time is required for power-on reset, wake-up from subclock mode or stop
mode.
9. Pin Connection
Treatment of unused pins
If an unused input pin is left unconnected, a component may be permanently damaged due to malfunctions or latch-ups. Always pull
up or pull down an unused input pin through a resistor of at least 2 k
. Set an unused input/output pin to the output state and leave
it unconnected, or set it to the input state and treat it the same as an unused input pin. If there is an unused output pin, leave it
unconnected.
Power supply pins
To reduce unnecessary electro-magnetic emission, prevent malfunctions of strobe signals due to an increase in the ground level, and
conform to the total output current standard, always connect the VCC pin and the VSS pin to the power supply and ground outside the
device. In addition, connect the current supply source to the VCC pin and the VSS pin with low impedance.
It is also advisable to connect a ceramic capacitor of approximately 0.1 µF as a decoupling capacitor between the VCC pin and the
VSS pin at a location close to this device.
DBG pin
Connect the DBG pin to an external pull-up resistor of 2 k
 or above.
After power-on, ensure that the DBG pin does not stay at “L” level until the reset output is released.
The DBG pin becomes a communication pin in debug mode. Since the actual pull-up resistance depends on the tool used and the
interconnection length, refer to the tool document when selecting a pull-up resistor.
RST pin
Connect the RST pin to an external pull-up resistor of 2 k
 or above.
To prevent the device from unintentionally entering the reset mode due to noise, minimize the interconnection length between a pull-up
resistor and the RST pin and that between a pull-up resistor and the VCC pin when designing the layout of the printed circuit board.
The PF2/RST pin functions as the reset input/output pin after power-on. In addition, the reset output of the PF2/RST pin can be enabled
by the RSTOE bit in the SYSC register, and the reset input function and the general purpose I/O function can be selected by the
RSTEN bit in the SYSC register.



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