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MB95F613K 데이터시트(PDF) 48 Page - Cypress Semiconductor |
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MB95F613K 데이터시트(HTML) 48 Page - Cypress Semiconductor |
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48 / 110 page ![]() Document Number: 002-04698 Rev. *A Page 48 of 110 PRELIMINARY MB95610H Series 15.3.3 Port 2 registers ■ Port 2 register functions ■ Correspondence between registers and pins for port 2 Register abbreviation Data Read Read by read-modify-write (RMW) instruction Write PDR2 0 Pin state is “L” level. PDR2 value is “0”. As output port, outputs “L” level. 1 Pin state is “H” level. PDR2 value is “1”. As output port, outputs “H” level. DDR2 0 Port input enabled 1 Port output enabled Correspondence between related register bits and pins Pin name P27 P26 P25 P24 P23 P22 P21 P20 PDR2 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 DDR2 |
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