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MB95F613K 데이터시트(PDF) 77 Page - Cypress Semiconductor

부품명 MB95F613K
상세설명  F2MC-8FX CPU core
PDF  110 Pages
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB95F613K 데이터시트(HTML) 77 Page - Cypress Semiconductor

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Document Number: 002-04698 Rev. *A
Page 77 of 110
PRELIMINARY
MB95610H Series
18.2 Recommended Operating Conditions
(VSS = 0.0 V)
*1: The minimum power supply voltage becomes 2.88 V when a product with the low-voltage detection reset is used or when the
on-chip debug mode is used.
*2: Use a ceramic capacitor or a capacitor with equivalent frequency characteristics. The decoupling capacitor for the VCC pin must
have a capacitance equal to or larger than the capacitance of CS. For the connection to a decoupling capacitor CS, see the diagram
below. To prevent the device from unintentionally entering an unknown mode due to noise, minimize the distance between the C
pin and CS and the distance between CS and the VSS pin when designing the layout of a printed circuit board.
WARNING:
The recommended operating conditions are required in order to ensure the normal operation of the semiconductor
device. All of the device's electrical characteristics are warranted when the device is operated under these conditions.
Any use of semiconductor devices will be under their recommended operating condition.
Operation under any conditions other than these conditions may adversely affect reliability of device and could result
in device failure.
No warranty is made with respect to any use, operating conditions or combinations not represented on this data sheet.
If you are considering application under any conditions other than listed herein, please contact sales representatives
beforehand.
Parameter
Symbol
Value
Unit
Remarks
Min
Max
Power supply voltage
VCC
2.4*1
5.5
V
In normal operation
2.3
5.5
V
Hold condition in stop mode
Decoupling capacitor
CS
0.022
1
µF
*2
Operating temperature
TA
 40
85
C
Not in on-chip debug mode
5
35
In on-chip debug mode
C
Cs
DBG
*
RST
• DBG / RST / C pins connection diagram
*: Connect the DBG pin to an external pull-up resistor of 2 k
 or above. After power-on, ensure that the
DBG pin does not stay at “L” level until the reset output is released. The DBG pin becomes a com-
munication pin in debug mode. Since the actual pull-up resistance depends on the tool used and the
interconnection length, refer to the tool document when selecting a pull-up resistor.



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