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MB91F467DA 데이터시트(PDF) 35 Page - Cypress Semiconductor

부품명 MB91F467DA
상세설명  32-bit RISC, load/store architecture, five-stage pipeline
PDF  137 Pages
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
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MB91F467DA 데이터시트(HTML) 35 Page - Cypress Semiconductor

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Document Number: 002-04613 Rev. *A
Page 35 of 137
MB91460D Series
9.3.3 Address mapping from CPU to parallel programming mode
The following tables show the calculation from CPU addresses to flash macro addresses which are used in parallel programming.
Address mapping MB91F467Dx
Note: FA result is without 20:0000h offset for parallel Flash programming.
Set offset by keeping FA[21] = 1 as described in section “Parallel Flash programming mode”.
Address mapping MB91F465DA
Note: FA result is without 10:0000h offset for parallel Flash programming.
Set offset by keeping FA[20] = 1 as described in section “Parallel Flash programming mode”
.
CPU Address
(addr)
Condition
Flash
sectors
FA (flash address) Calculation
14:0000h
to
14:FFFFh
addr[2]==0
SA0, SA2, SA4, SA6
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2
- (addr/2)%4 + addr%4 - 05:0000h
14:0000h
to
14:FFFFh
addr[2]==1
SA1, SA3, SA5, SA7
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2
- (addr/2)%4 + addr%4 - 05:0000h
+ 00:2000h
04:0000h
to
13:FFFFh
addr[2]==0
SA8, SA10, SA12, SA14, SA16,
SA18, SA20, SA22
(64 Kbyte)
FA := addr - addr%02:0000 + (addr%02:0000h)/2
- (addr/2)%4 + addr%4 + 0C:0000h
04:0000h
to
13:FFFFh
addr[2]==1
SA9, SA11, SA13, SA15, SA17,
SA19, SA21, SA23
(64 Kbyte)
FA := addr - addr%02:0000h + (addr%02:0000h)/2
- (addr/2)%4 + addr%4 + 0C:0000h
+ 01:0000h
CPU Address
(addr)
Condition
Flash
sectors
FA (flash address) Calculation
14:8000h
to
14:FFFFh
addr[2]==0
SA4, SA6
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2
- (addr/2)%4 + addr%4 - 0D:0000h
14:8000h
to
14:FFFFh
addr[2]==1
SA5, SA7
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2
- (addr/2)%4 + addr%4 - 0D:0000h
+ 00:2000h
08:0000h
to
0F:FFFFh
addr[2]==0
SA12, SA14, SA16, SA18
(64 Kbyte)
FA := addr - addr%02:0000 + (addr%02:0000h)/2
- (addr/2)%4 + addr%4 + 00:0000h
08:0000h
to
0F:FFFFh
addr[2]==1
SA13, SA15, SA17, SA19
(64 Kbyte)
FA := addr - addr%02:0000h + (addr%02:0000h)/2
- (addr/2)%4 + addr%4 - 00:0000h
+ 01:0000h



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