L5988D datasheet(17/52 Pages) STMICROELECTRONICS

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L5988D

Functional description

Beating frequency noise is an issue when more than one voltage rail is on the same board.

A simple way to avoid this problem is to operate all the regulators at the same switching

frequency. The synchronization feature of a set of L5988D is simply get connecting together

their SYNCH pin. The device with highest switching frequency will be the MASTER and

provides the synchronization signal to the others. Therefore the SYNCH is a I/O pin to

deliver or recognize a frequency signal.

In order to minimize the RMS current flowing through the input filter, the L5988D provides a

phase shift of 180° between the master and the SLAVES. In cases where more than two

devices are synchronized, all slaves will have a common 180° phase shift with respect to

the master.

In case the synchronized set shares a switching frequency different to the nominal 400 kHz,

it is suggested to provide the proper FSW resistor to each device. In this way all the devices

will have a common peak amplitude of the internal sawtooth signal so the same oscillator

gain in the open loop gain transfer function. In this way the same compensation network is

valid for all the devices.

Taking in account the case of two synchronized L5988D regulating the same output voltage,

the RMS current in the input filter will be optimized and will observe the following formula:

Equation 3

Multiple regulators can be also synchronized to an external frequency signal fed to the

SYNCH pin. In this case the set is phased to the reference and all the devices will work with

0° phase shift.

The graphical representation of the input RMS current of the input filter in the case of two

devices with 0° phase shift (synchronized to an external signal) or 180° phase shift

(synchronized connecting their SYNCH pins) regulating the same output voltage is provided

in Figure 8. To dimension the proper input capacitor please refer to Section 6.1 on page 25.

IRMS

IOUT

------------

1 2D

–





if D < 0.5



IOUT

------------

2D 1

–

 22D

–





if D > 0.5













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