SC2200 datasheet(229/433 Pages) NSC

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Core Logic Module (Continued)

Index F6h

Second Level PME/SMI Status Register 3 (RC)

Reset Value: 00h

The bits in this register contain second level status reporting. Top level status is reported in F1BAR0+I/O Offset 00h/02h[0].

Reading this register clears the status at both the second and top levels.

A read-only “Mirror” version of this register exists at F0 Index 86h. If the value of the register must be read without clearing the SMI

source (and consequently deasserting SMI), F0 Index 86h can be read instead.

Video Access Trap SMI Status. Indicates whether or not an SMI was caused by a trapped I/O access to the Video I/O Trap.

0: No.

1: Yes.

To enable SMI generation, set F0 Index 82h[7] = 1.

Reserved. Reads as 0.

Secondary Hard Disk Access Trap SMI Status. Indicates whether or not an SMI was caused by a trapped I/O access to

the secondary hard disk.

0: No.

1: Yes.

To enable SMI generation, set F0 Index 83h[6] = 1.

Secondary Hard Disk Idle Timer SMI Status. Indicates whether or not an SMI was caused by expiration of Secondary

Hard Disk Idle Timer Count register (F0 Index ACh).

0: No.

1: Yes.

To enable SMI generation, set F0 Index 83h[7] = 1.

Keyboard/Mouse Access Trap SMI Status. Indicates whether or not an SMI was caused by a trapped I/O access to the

keyboard or mouse.

0: No.

1: Yes.

To enable SMI generation, set F0 Index 82h[3] = 1.

Parallel/Serial Access Trap SMI Status. Indicates whether or not an SMI was caused by a trapped I/O access to either the

serial or parallel ports.

0: No.

1: Yes.

To enable SMI generation, set F0 Index 82h[2] =1.

Floppy Disk Access Trap SMI Status. Indicates whether or not an SMI was caused by a trapped I/O access to the floppy

disk.

0: No.

1: Yes.

To enable SMI generation, set F0 Index 82h[1] = 1.

Primary Hard Disk Access Trap SMI Status. Indicates whether or not an SMI was caused by a trapped I/O access to the

primary hard disk.

0: No.

1: Yes.

To enable SMI generation, set F0 Index 82h[0] = 1.

Table 5-29. F0: PCI Header and Bridge Configuration Registers for GPIO and LPC Support (Continued)

Bit

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