PC97338VLJ datasheet(116/221 Pages) NSC

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00 - Drive 0 is selected.

01 - Drive 1 is selected.

10 - If four drives are supported, or drives 2 and 0

are exchanged, drive 2 is selected.

11 - If four drives are supported, drive 3 is select-

ed.

Bit 2 - Most Significant Byte (MSB)

This bit, together with bits 1,0, determines the byte

to read or write. See also Table 57.

0 - Least significant byte of the track number.

1 - Most significant byte of the track number.

TABLE 57. Defining Bytes to Read or Write Us-

ing SET TRACK

Execution Phase

Internal register is read or written.

Result Phase

This byte is one byte of the track number that was

read or written, depending on the value of WNR in the

first command byte.

3.6.21 The SPECIFY Command

The SPECIFY command sets initial values for the fol-

lowing time periods:

• The delay before command processing starts,

formerly called Motor On Time (MNT)

• The delay after command processing terminates,

formerly called Motor Off Time (MFT)

• The interval step rate time.

The FDC uses the Digital Output Register (DOR) to

enable the drive and motor select signals. See also,

“Digital Output Register (DOR), Offset 010” on page

77.

The delays may be used to support the

µPD765, i.e.,

to insert delays from selection of a drive motor until a

read or write operation starts, and from termination of

a command until the drive motor is no longer selected,

respectively.

The parameters used by this command are undefined

after power up, and are unaffected by any reset.

Therefore, software should always issue a SPECIFY

command as part of an initialization routine to initialize

these parameters.

Termination of this command does not generate an

interrupt.

Command Phase.

Second Command Phase Byte

Bits 3-0 - Delay After Processing Factor

These bits specify a factor that is multiplied by a

constant to determine the delay after command

processing ends, i.e., from termination of a com-

mand until the drive motor is no longer selected.

The value of the Motor Timer Values (TMR) bit (bit

7) of the second command phase byte in the

MODE command determines which group of con-

stants and delay ranges to use. See “Bit 7 - Motor

Timer Values (TMR)” on page 101.

The specific constant that will be multiplied by this

factor to determine the actual delay after process-

ing for each data transfer rate is shown in Table

58.

Use the smallest possible value for this factor, ex-

cept 0, i.e., 1. If this factor is 0, the value16 is used.

MSB

DS1

DS0

Byte to Read or Write

210

000

Drive 0 (LSB)

100

Drive 0 (MSB)

001

Drive 1 (LSB)

101

Drive 1 (MSB)

010

Drive 2 (LSB)

110

Drive 2 (MSB)

011

Drive 3 (LSB)

111

Drive 3 (MSB)

7654

3210

Byte of Present Track Number(PTR)

7654

3210

0000

0011

Step Rate Time (SRT)

Delay After Processing

Delay Before Processing

DMA

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