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PC87366 데이터시트(PDF) 29 Page - National Semiconductor (TI) |
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PC87366 데이터시트(HTML) 29 Page - National Semiconductor (TI) |
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29 / 240 page ![]() 1.0 Signal/Pin Connection and Description (Continued) 29 www.national.com 1.4.13 Protection 1.4.14 Serial Port 1 and Serial Port 2 VDD 20, 52, 83, 115 I PWR - Main 3.3V Power Supply VSB 31 I PWR - Standby 3.3V Power Supply. Provides power to the Wake-Up Control circuitry, while the main power supply is turned off. VSS 19, 51, 84, 116 I GND - Ground Signal Pin(s) I/O Buffer Type Power Well Description CHASI 29 I INC VPP Chassis Intrusion Input. Any change of this pin sets the intrusion detection. For correct operation, this pin must be tied to VSS when it is not used. CHASO 28 O OD6 VSB Chassis Intrusion Output. When low, indicates that an intrusion indication is set. Signal Pin/s I/O Buffer Type Power Well Description CTS1 CTS2 100 108 I INTS VDD Clear to Send. When low, indicate that the modem or other data transfer device is ready to exchange data. DCD1 DCD2 95 103 I INTS VDD Data Carrier Detected. When low, indicate that the modem or other data transfer device has detected the data carrier. DSR1 DSR2 96 104 I INTS VDD Data Set Ready. When low, indicate that the data transfer device, e.g., modem, is ready to establish a communications link. DTR1_ BOUT1 DTR2_ BOUT2 101 109 O O3/6 VDD Data Terminal Ready. When low, indicate to the modem or other data transfer device that the UART is ready to establish a communications link. After a system reset, these pins provide the DTR function and set these signals to inactive high. Loopback operation holds them inactive. Baud Output. Provides the associated serial channel baud rate generator output signal if test mode is selected, i.e., bit 7 of the EXCR1 Register is set. DTR1_BOUT1 is used also as BADDR. RI1 RI2 102 110 I INTS VDD,VSB Ring Indicator. When low, indicate that a telephone ring signal has been received by the modem. They are monitored during power-off for wake-up event detection. RTS1 RTS2 98 106 O O3/6 VDD Request to Send. When low, indicate to the modem or other data transfer device that the corresponding UART is ready to exchange data. A system reset sets these signals to inactive high, and loopback operation holds them inactive. RTS1 is used also as TEST. SIN1 SIN2 97 105 I INTS VDD Serial Input. Receive composite serial data from the communications link (peripheral device, modem or other data transfer device). SOUT1 SOUT2 99 107 O O3/6 VDD Serial Output. Send composite serial data to the communications link (peripheral device, modem or other data transfer device). These signals are set active high after a system reset. Signal Pin/s I/O Buffer Type Power Well Description |
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