TNETV6446AINZWT datasheet(179/227 Pages) TI1

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TMS320DM6446

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SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010

6.14 Host-Port Interface (HPI)

The Host Port Interface (HPI) provides a parallel port through which an external host processor can

access the DM6446 memory space. The host device is asynchronous to the DM6446 clocks and functions

as a master to the HPI interface. The HPI enables a host device and DM6446 to exchange information via

internal or external memory. Both the host and DM6446 can access the HPI control register (HPIC) and

the HPI address registers (HPIAR, HPIAW). The host can access the HPI data register (HPID) and the

HPIC by using the external data and interface control signals.

The HPI interface shares the DaVinci EMIFA 16-bit data bus pins for multiplexed address/data and

supports the following modes:

•

16 Bit Multiplexed mode / dual half-word cycles (16 bit host data bus/32 bit memory width)

•

ARM ROM supports booting of DM6446 ARM processor from an external processor

The HPI registers are summarized in Table 6-66. For more detailed information on the HPI peripheral, see

the TMS320DM644x DMSoC Host Port Interface (HPI) User's Guide (literature number SPRUE97).

Table 6-66. Host-Port Interface (HPI) Register Descriptions

HEX ADDRESS RANGE

ACRONYM

0x01C4 0030

HPI_CTL

Host-Port Interface Configuration Register

0x01C6 7800

HPI_PID

0x01C6 7804

HPIPWREMU

HPI Power and Emulation Management Register

0x01C6 7808 - 0x01C6 782F

–

Reserved

0x01C6 7830

HPIC

Host-Port Interface Control Register

0x01C6 7834

HPIAW

Host-Port Interface Write Address Register

0x01C6 7838

HPIAR

Host-Port Interface Read Address Register

0x01C6 783C - 0x01C6 7FFF

–

Reserved

The HPI_CTL register sets the owner of HPIA(R/W) and HPIC registers for HPI address and control. The

details for HPI_CTL are shown in Figure 6-55 and Table 6-67.

Figure 6-55. HPI_CTL Register

Reserved

R-0000000000000000

CTL

ADD

Reserved

TIMOUT

MODE

R-0

R/W-0

R/W-10000000

LEGEND: R = Read, W = Write, n = value at reset

Table 6-67. HPI_CTL Register Description

Name

Description

CTLMODE

HPIC register write access

0 = External Host

1 = DM6446 (if ADDMODE = 1)

ADDMODE

HPIA register write access

0 = External Host

1 = DM6446

TIMOUT

Host burst write timeout value

Peripheral and Electrical Specifications

179

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