SPC560P34L1 datasheet(54/103 Pages) STMICROELECTRONICS

54 / 103 page

Electrical characteristics

SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3

54/103

Doc ID 16100 Rev 7

3.6

Electromagnetic interference (EMI) characteristics

3.7

Electrostatic discharge (ESD) characteristics

3.8

Power management electrical characteristics

3.8.1

Voltage regulator electrical characteristics

The internal voltage regulator requires an external NPN ballast, approved ballast list

availbale in Table 15, to be connected as shown in Figure 10. Capacitances should be

placed on the board as near as possible to the associated pins. Care should also be taken

to limit the serial inductance of the VDD_HV_REG, BCTRL and VDD_LV_CORx pins to less than

LReg. (refer to Table 16).

Table 13.

EMI testing specifications

Symbol

Parameter

Conditions

Clocks

Frequency

Level

(Typ)

Unit

VEME

Radiated

emissions

VDD = 5.0 V; TA =25 °C

Other device configuration,

test conditions and EM testing

per standard IEC61967-2

fOSC =8 MHz

fCPU =64 MHz

No PLL frequency

modulation

150 kHz–150 MHz

dBµ

150–1000 MHz

IEC level

—

fOSC =8 MHz

fCPU =64 MHz

±4% PLL frequency

modulation

150 kHz–150 MHz

dBµ

150–1000 MHz

IEC level

—

VDD = 3.3 V; TA =25 °C

Other device configuration,

test conditions and EM testing

per standard IEC61967-2

fOSC =8 MHz

fCPU =64 MHz

No PLL frequency

modulation

150 kHz–150 MHz

dBµ

150–1000 MHz

IEC level

—

fOSC =8 MHz

fCPU =64 MHz

±4% PLL frequency

modulation

150 kHz–150 MHz

dBµ

150–1000 MHz

IEC level

—

Table 14.

ESD ratings(1),(2)

Symbol

Parameter

Conditions

Value

Unit

VESD(HBM)

Electrostatic discharge (Human Body Model)

—

2000

VESD(CDM)

Electrostatic discharge (Charged Device Model)

—

750 (corners)

500 (other)

All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits.

A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device specification

requirements. Complete DC parametric and functional testing shall be performed per applicable device specification at

room temperature followed by hot temperature, unless specified otherwise in the device specification.

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