ST10F296 datasheet(206/346 Pages) STMICROELECTRONICS

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Real-time clock (RTC)

ST10F296E

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RTC prescaler registers (RTCPH and RTCPL)

The 20-bit programmable prescaler divider is loaded with two registers: The RTC prescaler

high (RTCPH) and RTC prescaler low (RTCPL).

The four most significant bits are stored in the RTCPH and the 16 least significant bits are

stored in the RTCPL.

To maintain the system clock, these registers are not reset. They are write protected by the

RTCOFF bit of the RTCCON register. Write operation is allowed when RTCOFF is set.

Note:

Bits 15 to 4 of the RTCPH are not used. When reading this register, the return value of these

bit is zero.

Figure 73.

Prescaler registers

The value stored in RTCPH and RTCPL is called RTCP (coded on 20-bit). The dividing ratio

of the prescaler divider is: 64 x (RTCP).

RTCPH (ED08h)

XBus

Reset value: ---Xh

987

65432

Reserved

RTCPH

-RW

RTCPL (ED06h)

XBus

Reset value: XXXXh

987

65432

RTCPL

RTCPH

RTCPL

20-bit word counter

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