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ST10F296 데이터시트(PDF) 32 Page - STMicroelectronics |
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ST10F296 데이터시트(HTML) 32 Page - STMicroelectronics |
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32 / 346 page ![]() Obsolete Product(s) - Obsolete Product(s) Functional description ST10F296E 32/346 3 Functional description The architecture of the ST10F296E combines advantages of both RISC and CISC processors and an advanced peripheral subsystem. The block diagram of Figure 3 gives an overview of the different on-chip components and the high bandwidth internal bus structure of the ST10F296E. Figure 3. Block diagram BRG BRG Port 6 Port 5 CPU-Core and MAC unit XTimer XASC XCAN2 XPort 9 XPWM XRAM 2K XRAM 16K XRAM 48K (STBY) (PEC) XFlash 320K IFlash 512K 32 16 16 16 16 16 16 16 16 16 16 16 PEC Interrupt controller Port 3 Port 7 Port 8 16 Watchdog IRAM 2K 16 XRTC Oscillator PLL 5V-1.8V voltage regulator 16 16 8 8 16 1588 16 16 XCAN1 16 XPort 10 16 XSSC 16 XI2C 16 16 16 4 Obsolete Product(s) - Obsolete Product(s) |
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