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ST72321R7-Auto 데이터시트(PDF) 241 Page - STMicroelectronics |
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ST72321R7-Auto 데이터시트(HTML) 241 Page - STMicroelectronics |
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241 / 243 page ![]() ST72321xx-Auto Known limitations Doc ID 13829 Rev 1 241/243 Consequently, the LVD function is not guaranteed in the current silicon revision. For complete security, an external reset circuit must be added. 22.3.2 LVD startup behavior When the LVD is enabled, the MCU reaches its authorized operating voltage from a reset state. However, in some devices, the reset state is released when VDD is approximately between 0.8V and 1.5V. As a consequence, the I/Os may toggle when VDD is within this window. This may be an issue especially for applications where the MCU drives power components. Figure 108. LVD startup behavior 22.3.3 AVD not supported On some devices with a specific VDD ramp up speed the AVD may not start. As a result it cannot generate interrupts when VDD rises and falls. 22.3.4 Internal RC oscillator operation Internal RC oscillator operation is not supported in ROM devices. 22.3.5 External clock source with PLL External clock source is not supported with the PLL enabled. 22.3.6 Pull-up not present on PE2 Unlike ST72F321 Flash devices, ST72321 ROM devices have no weak pull-up on port PE2. In LQFP44 ROM devices, the PE2 pad is not connected to an internal pull-up like other unbonded pads. It is recommended to configure it as output push-pull to avoid added current consumption. 22.3.7 Readout protection with LVD The LVD is not supported if readout protection is enabled. 5V 1.5V VIT+ 0.8V LVD RESET V D D Window t |
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