STM32F101XF datasheet(87/117 Pages) STMICROELECTRONICS

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STM32F101xF, STM32F101xG

Electrical characteristics

5.3.17

Communications interfaces

I2C interface characteristics

The STM32F101xF and STM32F101xG access line I2C interface meets the requirements of

the standard I2C communication protocol with the following restrictions: the I/O pins SDA

and SCL are mapped to are not “true” open-drain. When configured as open-drain, the

PMOS connected between the I/O pin and VDD is disabled, but is still present.

The I2C characteristics are described in Table 52. Refer also to Section 5.3.13: I/O current

injection characteristics for more details on the input/output alternate function characteristics

(SDA and SCL).

Table 52. I2C characteristics

Symbol

Parameter

Standard mode

I2C(1)(2)

1. Guaranteed by design.

2. fPCLK1 must be at least 2 MHz to achieve standard mode I2C frequencies. It must be at least 4 MHz to

achieve the fast mode I2C frequencies and it must be a multiple of 10 MHz in order to reach the I2C fast

mode maximum clock speed of 400 kHz.

Fast mode I2C(1)(2)

Unit

Min

Max

Min

Max

tw(SCLL)

SCL clock low time

4.7

1.3

µs

tw(SCLH) SCL clock high time

4.0

0.6

tsu(SDA)

SDA setup time

250

100

th(SDA)

SDA data hold time

3450(3)

3. The maximum data hold time has only to be met if the interface does not stretch the low period of SCL

signal.

900(3)

tr(SDA)

tr(SCL)

SDA and SCL rise time

1000

300

tf(SDA)

tf(SCL)

SDA and SCL fall time

300

th(STA)

Start condition hold time

4.0

0.6

µs

tsu(STA)

Repeated Start condition setup

time

4.7

0.6

tsu(STO)

Stop condition setup time

4.0

0.6

µs

tw(STO:STA)

Stop to Start condition time (bus

free)

4.7

1.3

µs

Capacitive load for each bus line

400

tSP

Pulse width of the spikes that are

suppressed by the analog filter for

standard and fast mode

050(4)

4. The minimum width of the spikes filtered by the analog filter is above tSP(max).

050(4)

μs

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