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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32F101XF 데이터시트(PDF) 97 Page - STMicroelectronics |
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STM32F101XF 데이터시트(HTML) 97 Page - STMicroelectronics |
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97 / 117 page  DocID16553 Rev 5 97/117 STM32F101xF, STM32F101xG Electrical characteristics Figure 50. Power supply and reference decoupling (VREF+ connected to VDDA) 1. VREF+ and VREF- inputs are available only on 100-pin packages. 5.3.19 DAC electrical specifications Table 60. DAC characteristics Symbol Parameter Conditions Min Typ Max(1) Unit Comments VDDA Analog supply voltage 2.4 - 3.6 V - VREF+ Reference supply voltage 2.4 - 3.6 V VREF+ must always be below VDDA VSSA Ground 0 - 0 V - RLOAD(2) Resistive load with buffer ON DAC output buffer ON RLOAD connected to VSSA 5- - k Ω - RLOAD connected to VDDA 25 - - - RO(2) Impedance output with buffer OFF -- 15 k Ω When the buffer is OFF, the minimum resistive load between DAC_OUT and VSS to have a 1% accuracy is 1.5 M Ω CLOAD(2) Capacitive load - - 50 pF Maximum capacitive load at DAC_OUT pin (when the buffer is ON). |
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