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STM32F101XF 데이터시트(PDF) 39 Page - STMicroelectronics

부품명 STM32F101XF
상세설명  Single-cycle multiplication and hardware division
PDF  117 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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STM32F101XF 데이터시트(HTML) 39 Page - STMicroelectronics

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STM32F101xF, STM32F101xG
Electrical characteristics
5.3
Operating conditions
5.3.1
General operating conditions
5.3.2
Operating conditions at power-up / power-down
The parameters given in Table 11 are derived from tests performed under the ambient
temperature condition summarized in Table 10.
Table 10. General operating conditions
Symbol
Parameter
Conditions
Min
Max
Unit
fHCLK
Internal AHB clock frequency
-
0
36
MHz
fPCLK1
Internal APB1 clock frequency
-
0
36
fPCLK2
Internal APB2 clock frequency
-
0
36
VDD
Standard operating voltage
-
2
3.6
V
VDDA(1)
1. When the ADC is used, refer to Table 56: ADC characteristics.
Analog operating voltage
(ADC not used)
Must be the same potential
as VDD(2)
2. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV
between VDD and VDDA can be tolerated during power-up and operation.
23.6
V
Analog operating voltage
(ADC used)
2.4
3.6
VBAT
Backup operating voltage
-
1.8
3.6
V
PD
Power dissipation at TA =
85 °C(3)
3. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Section 6.4:
Thermal characteristics).
LQFP144
-
666
mW
LQFP100
-
434
LQFP64
-
444
TA
Ambient temperature
Maximum power dissipation
–40
85
°C
low-power dissipation(4)
4. In low-power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see
Section 6.4: Thermal characteristics).
–40
105
°C
TJ
Junction temperature range
-
–40
105
°C
Table 11. Operating conditions at power-up / power-down
Symbol
Parameter
Conditions
Min
Max
Unit
tVDD
VDD rise time rate
-
0
µs/V
VDD fall time rate
20



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