STM32F769AI datasheet(151/255 Pages) STMICROELECTRONICS

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STM32F765xx STM32F767xx STM32F768Ax STM32F769xx

Electrical characteristics

224

Figure 35. PLL output clock waveforms in down spread mode

5.3.13

MIPI D-PHY characteristics

The parameters given in Table 51 and Table 52 are derived from tests performed under

temperature and VDD supply voltage conditions summarized in Table 17.

Table 51. MIPI D-PHY characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Hi-Speed Input/Output Characteristics

UINST

UI instantaneous

12.5

VCMTX

HS transmit common mode

voltage

150

200

250

|ΔVCMTX|

VCMTX mismatch when output

is Differential-1 or Differential-0

|VOD|

HS transmit differential voltage

140

200

270

|ΔVOD|

VOD mismatch when output is

Differential-1 or Differential-0

VOHHS

HS output high voltage

360

ZOS

Single ended output

impedance

62.5

ΔZOS

Single ended output

impedance mismatch

tHSr & tHSf 20%-80% rise and fall time

100

0.35*UI

LP Receiver Input Characteristics

VIL

Logic 0 input voltage (not in

ULP State)

550

VIL-ULPS

Logic 0 input voltage in ULP

State

300

VIH

Input high level voltage

880

Vhys

Voltage hysteresis

LP Emitter Output Characteristics

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