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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STR710FZ1 데이터시트(PDF) 64 Page - STMicroelectronics |
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STR710FZ1 데이터시트(HTML) 64 Page - STMicroelectronics |
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64 / 80 page  Electrical parameters STR71xFxx STR710RZ 64/80 Doc ID 10350 Rev 13 Figure 34. SPI slave timing diagram with CPHA=01) Figure 35. SPI slave timing diagram with CPHA=11) Figure 36. SPI master timing diagram1) 1. Measurement points are done at CMOS levels: 0.3xV33 and 0.7xV33 SS INPUT CPHA=0 MOSI INPUT MISO OUTPUT CPHA=0 tc(SCK) tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) tv(SO) ta(SO) tsu(SI) th(SI) MSB OUT MSB IN BIT6 OUT LSB IN LSB OUT CPOL=0 CPOL=1 tsu(SS) th(SS) tdis(SO) th(SO) BIT1 IN SS INPUT CPHA=1 MOSI INPUT MISO OUTPUT CPHA=1 tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) ta(SO) tsu(SI) th(SI) MSB OUT BIT6 OUT LSB OUT CPOL=0 CPOL=1 tsu(SS) th(SS) tdis(SO) th(SO) tc(SCK) tv(SO) MSB IN LSB IN BIT1 IN CPHA = 0 MOSI OUTPUT MISO INPUT CPHA = 0 CPHA = 1 CPHA = 1 tc(SCK) tw(SCKH) tw(SCKL) th(MI) tsu(MI) MSB IN MSB OUT BIT6 IN BIT6 OUT LSB OUT LSB IN CPOL = 0 CPOL = 1 CPOL = 0 CPOL = 1 tr(SCK) tf(SCK) th(MO) tv(MO) SS INPUT |
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