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STR710FZ1 데이터시트(PDF) 51 Page - STMicroelectronics |
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STR710FZ1 데이터시트(HTML) 51 Page - STMicroelectronics |
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51 / 80 page ![]() STR71xFxx STR710RZ Electrical parameters Doc ID 10350 Rev 13 51/80 4.3.5 I/O port pin characteristics General characteristics Subject to general operating conditions for V33 and TA unless otherwise specified. All unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or an external pull-up or pull-down resistor. Notes: 1. Data based on characterization results, not tested in production. 2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested. 3. When the current limitation is not possible, the VIN absolute maximum rating must be respected, otherwise refer to IINJ(PIN) specification. A positive injection is induced by VIN>V33 while a negative injection is induced by VIN<VSS. Refer to Section 4.2 on page 35 for more details. 4. Leakage could be higher than max. if negative current is injected on adjacent pins. 5. The RPU pull-up and RPD pull-down equivalent resistor are based on a resistive transistor (corresponding IPU and IPD current characteristics described in Figure 18 to Figure 19). Table 27. I/O static characteristics Symbol Parameter Conditions Min Typ Max Unit VIL Input low level voltage 1) CMOS ports 0.3V33 V VIH Input high level voltage 1) 0.7V33 Vhys Schmitt trigger voltage hysteresis 2) 0.8 V VIL Input low level voltage 1) P0.15 WAKEUP 0.9 0.8 V VIH Input high level voltage 1) 21.35 Vhys Schmitt trigger voltage hysteresis 2) 0.4 V VIL Input low level voltage 1) TTL ports 0.8 V VIH Input high level voltage 1) 2.0 IINJ(PIN) Injected Current on any I/O pin ± 4 mA ΣIINJ(PIN) 3) Total injected current (sum of all I/O and control pins) ± 25 Ilkg Input leakage current 4) VSS≤VIN≤V33 ±1 μA RPU Weak pull-up equivalent resistor5) VIN=VSS 110 150 700 k Ω RPD Weak pull-down equivalent resistor5) VIN=V33 110 150 700 k Ω CIO I/O pin capacitance 5 pF |
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