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NAND01GR3A 데이터시트(PDF) 26 Page - STMicroelectronics |
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NAND01GR3A 데이터시트(HTML) 26 Page - STMicroelectronics |
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26 / 57 page ![]() NAND128-A, NAND256-A, NAND512-A, NAND01G-A 26/57 Copy Back Program The Copy Back Program operation is used to copy the data stored in one page and reprogram it in an- other page. The Copy Back Program operation does not re- quire external memory and so the operation is faster and more efficient because the reading and loading cycles are not required. The operation is particularly useful when a portion of a block is up- dated and the rest of the block needs to be copied to the newly assigned block. If the Copy Back Program operation fails an error is signalled in the Status Register. However as the standard external ECC cannot be used with the Copy Back operation bit error due to charge loss cannot be detected. For this reason it is recom- mended to limit the number of Copy Back opera- tions on the same data and or to improve the performance of the ECC. The Copy Back Program operation requires three steps: 1. The source page must be read using the Read A command (one bus write cycle to setup the command and then 4 bus write cycles to input the source page address). This operation copies all 264 Words/ 528 Bytes from the page into the Page Buffer. 2. When the device returns to the ready state (Ready/Busy High), the second bus write cycle of the command is given with the 4 bus cycles to input the target page address. Refer to Table 10. for the addresses that must be the same for the Source and Target pages. 3. Then the confirm command is issued to start the P/E/R Controller. After a Copy Back Program operation, a partial- page program is not allowed in the target page un- til the block has been erased. See Figure 18. for an example of the Copy Back operation. Table 10. Copy Back Program Addresses Note: 1. DD = Dual Die. Figure 18. Copy Back Operation Density Same Address for Source and Target Pages 128 Mbit A23 256 Mbit A24 512 Mbit A25 512 Mbit DD(1) A24, A25 1 Gbit DD(1) A25, A26 I/O RB Source Address Inputs SR0 ai07590b 8Ah 70h 00h Copy Back Code Read Code Read Status Register Target Address Inputs tBLBH1 (Read Busy time) 10h Busy tBLBH2 (Program Busy time) |
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