| 전자부품 데이터시트 검색엔진 |
|
HT82M9BA 데이터시트(PDF) 23 Page - Holtek Semiconductor Inc |
|
|
|||||||||||||||||||||||||||||
HT82M9BA 데이터시트(HTML) 23 Page - Holtek Semiconductor Inc |
|
23 / 44 page ![]() HT82M9BE/HT82M9BA Rev. 1.80 23 December 22, 2008 Clock Control Register - SCC There is a system clock control register implemented to select the clock used in the MCU. This register consists of USB clock control bit (USBCKEN), second suspend mode control bit (SUSPEND2) and system clock selection (SCLKSEL). Bit No. Label Read/Write Option Functions 0~2 PF0~PF2 R/W ¾ Reserved, must set to ²0². 3 PF3 R/W USBCKEN USB clock control bit. When set to ²1², indicates a USBCK ON, else USBCK OFF. The default value is ²0². 4 PF4 R/W SUSPEND2 This bit is used to reduce power consumption in the suspend mode. In the normal mode this bit must be cleared to zero(De- fault= ²0²). In the HALT mode this bit should be set high to re- duce power consumption and LVR with no function. In the USB mode this bit cannot be set high. 5 PF5 R/W ¾ Reserved, must set to ²0². 6 PF6 R/W SCLKSEL System clock 6MHz or 12MHz option, when working on exter- nal oscillator mode. The default value is ²0². 0: Operating at external 12MHz mode 1: Operating at external 6MHz mode The default value is ²0². 7 PF7 R/W PS2_flag This flag is used to show that the MCU is in PS2 mode (Bit=1). This bit is R/W by FW and will be cleared to zero after power-on reset. The default value is ²0². SCC (0X1C) Register Table High Byte Pointer for Current Table Read - TBHP Bit No. Label Read/Write Option Functions 4~0 PGC4~PGC0 R/W ¾ Store current table read bit12~bit8 data TBHP (0X1F) Register Options No. Option 1 WDT clock source: RC (system/4) (default: T1) 2 WDT clock source: enable/disable for normal mode (default: disable) 3 PA0~PA7 ,PB4, PB7 wake-up by bit (PA2, PA3 both wake-up by falling or rising edge) (default: non wake-up) 4 PA0~PA7 pull-high by bit (default: pull-high) 5 PB pull-high by bit (default: pull-high) 6 PC pull-high by nibble (default: pull-high) 7 LVR enable/disable (default: enable) 8 PA0~PA3, PB2, PB3 pull-low by bit (default: non pull-low 30k W) 9 ²CLR WDT², 1 or 2 instructions 10 TBHP enable/disable (default: disable) 11 PA output mode (CMOS/NMOS/PMOS) by bit (default: CMOS) |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |