PIC12CE673-04SLASHP datasheet(53/116 Pages) MICROCHIP

53 / 116 page

Preliminary

DS40181B-page 53

PIC12CE67X

FIGURE 9-11: EXTERNAL POWER-ON

RESET CIRCUIT (FOR SLOW

VDD POWER-UP)

Note 1: External Power-on Reset circuit is required

only if VDD power-up slope is too slow. The

diode D helps discharge the capacitor

quickly when VDD powers down.

2: R < 40 k

Ω is recommended to make sure

that voltage drop across R does not violate

the device’s electrical speciﬁcation.

3: R1 = 100

Ω to 1 kΩ will limit any current

ﬂowing into MCLR from external capacitor

C in the event of MCLR/VPP pin break-

down due to Electrostatic Discharge

(ESD) or Electrical Overstress (EOS).

VDD

MCLR

PIC12CE67X

FIGURE 9-12: EXTERNAL BROWN-OUT

PROTECTION CIRCUIT 1

FIGURE 9-13: EXTERNAL BROWN-OUT

PROTECTION CIRCUIT 2

Note 1: This circuit will activate reset when VDD

goes below (Vz + 0.7V) where Vz = Zener

voltage.

2: Internal brown-out detection should be

disabled when using this circuit.

3: Resistors should be adjusted for the char-

acteristics of the transistor.

VDD

33k

10k

4.3k

VDD

MCLR

PIC12CE67X

Note 1: This brown-out circuit is less expensive,

albeit less accurate. Transistor Q1 turns

off when VDD is below a certain level

such that:

2: Internal brown-out detection should be

disabled, if available, when using this

circuit.

3: Resistors should be adjusted for the

characteristics of the transistor.

VDD •

R1 + R2

= 0.7V

VDD

4.3k

PIC12CE67X

VDD

MCLR

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