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MFC2000 데이터시트(PDF) 288 Page - List of Unclassifed Manufacturers

부품명 MFC2000
상세설명  Multifunctional Peripheral Controller 2000
PDF  426 Pages
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제조업체  ETC [List of Unclassifed Manufacturers]
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MFC2000 데이터시트(HTML) 288 Page - List of Unclassifed Manufacturers

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MFC2000 Multifunctional Peripheral Controller 2000
Hardware Description
15-8
Conexant
100723A
Bit 2:
TxBufIrqEnb (Transmit Buffer IRQ Enable)
Read/Write bit.
When the TxBufIrqEnb bit is cleared (default), the TxBufIRQ signal is
disabled. The TxBufIRQ will be activated, when the TxBufIrqEnb
control bit and the TxBufEmpty status bit are set.
Bit 1:
TxShfIrqEnb (Transmit Shift Empty IRQ Enable)
Read/Write bit.
When the TxShfIrqEnb bit is cleared (default), the TxShfIRQ signal will
be disabled. The TxShfIRQ will be activated, when the TxShfIrqEnb
control bit and the TxShfEmpty status bit are set.
Bit 0:
RxBufIrq (Receive Buffer IRQ Enable)
Read/Write bit.
When the RxBufIrqEnb bit is cleared (default), the RxBufIRQ signal
will be disabled. The RxBufIRQ will be activated, when the
RxBufIrqEnb control bit and the RxBufFull status bit are set.
For monitoring the TxBuffer, TxShift, and RxBuffer Register status, the SASIF has four status bits. They are
TxBufEmpty, TxShfEmpty, RxBufFull, and RxTimerElapsed status bits. Following are the conditions when the
status bits are set and cleared:
TxBufEmpty
TxShfEmpty
RxBufFull
1
Set when
1. the system resets, or
2. the last bit of the TxShift Register is
sent to the SASTXD pin
1. the system resets, or
2. the TxBufEmpty status bit is set and
the last bit of the TxShift Register is
sent to the SASTXD pin.
1. the stop bit is received by the
SASRXD pin.
Cleared
when
1. the CPU writes to the SASData
Register, and
2. the TxShfEmpty status bit is cleared.
1. the CPU writes to the SASData
Register, and
2. the TxBufEmpty status bit is set.
1. the system reset, or
2. the CPU reads the SASData
Register.
RxTimerElapsed
Set when
When all of these are true for the time it would take to
receive 4 bytes into the Rx buffer.
The RxFIFO is not full,
No start bit has been received,
the SASRxData Register has not been read and written
back to.
Cleared
when
1. the system resets
2. the CPU writes to the SASRxData Register



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