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WM8976 데이터시트(PDF) 31 Page - Wolfson Microelectronics plc

부품명 WM8976
상세설명  Low Power CODEC With Speaker Driver
PDF  83 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8976 데이터시트(HTML) 31 Page - Wolfson Microelectronics plc

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Preliminary Technical Data
WM8976
w
PTD Rev 2.0 February 2005
31
PROGRAMMABLE NOTCH FILTER
A programmable notch filter is provided. This filter has a variable centre frequency and bandwidth,
programmable via two coefficients, a0 and a1.
a0 and a1 are represented by the register bits
NFA0[13:0] and NFA1[13:0]. Because these coefficient values require four register writes to setup
there is an NFU (Notch Filter Update) flag which should be set only when all four registers are setup.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
6:0
NFA0[13:7]
0
Notch Filter a0 coefficient, bits [13:7]
7
NFEN
0
Notch filter enable:
0=Disabled
1=Enabled
R27
Notch Filter 1
8
NFU
0
Notch filter update. The notch filter
values used internally only update
when one of the NFU bits is set high.
6:0
NFA0[6:0]
0
Notch Filter a0 coefficient, bits [6:0]
R28
Notch Filter 2
8
NFU
0
Notch filter update. The notch filter
values used internally only update
when one of the NFU bits is set high.
6:0
NFA1[13:7]
0
Notch Filter a1 coefficient, bits [13:7]
R29
Notch Filter 3
8
NFU
0
Notch filter update. The notch filter
values used internally only update
when one of the NFU bits is set high.
6:0
NFA1[6:0]
0
Notch Filter a1 coefficient, bits [6:0]
R30
Notch Filter 4
8
NFU
0
Notch filter update. The notch filter
values used internally only update
when one of the NFU bits is set high.
Table 17 Notch Filter Function
The coefficients are calculated as follows:
)
2
/
tan(
1
)
2
/
tan(
1
0
b
b
w
w
a
+
−
=
)
cos(
)
1
(
0
0
1
w
a
a
+
−
=
Where:
s
c
f
f
w
/
2
0
π
=
s
b
b
f
f
w
/
2
π
=
fc = centre frequency in Hz, fb = -3dB bandwidth in Hz, fs = sample frequency in Hz
The actual register values can be determined from the coefficients as follows:
NFA0 = -a0 x 2
13
NFA1 = -a1 x 2
12
DIGITAL ADC VOLUME CONTROL
The output of the ADC can be digitally attenuated over a range from –127dB to 0dB in 0.5dB steps.
The gain for a given eight-bit code X is given by:
0.5
× (G-255) dB for 1 ≤ G ≤ 255;
MUTE for G = 0



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