WM8976 datasheet(37/83 Pages) WOLFSON

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Preliminary Technical Data

WM8976

PTD Rev 2.0 February 2005

Figure 17 DAC Digital Filter Path

The analogue outputs from the DACs can then be mixed with the aux analogue inputs and the ADC

analogue input. The mix is fed to the output drivers for headphone (LOUT1/ROUT1), speaker

(LOUT2/ROUT2) or line (OUT3/OUT4).

OUT3 and OUT4 have additional mixers which allow them

to output different signals to the headphone and speaker outputs.

DIGITAL PLAYBACK (DAC) PATH

Digital data is passed to the WM8976 via the flexible audio interface and is then passed through a

variety of advanced digital filters as shown in Figure 17 to the hi-fi DACs. The DACs are enabled by

the DACENL/R register bits.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

DACENL

Left channel DAC enable

0 = DAC disabled

1 = DAC enabled

Power

Management 3

DACENR

Right channel DAC enable

0 = DAC disabled

1 = DAC enabled

Table 21 DAC Enable Control

The WM8976 also has a Soft Mute function, which gradually attenuates the volume of the digital

signal to zero. When removed, the gain will ramp back up to the digital gain setting.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

DACLPOL

Left DAC output polarity:

0 = non-inverted

1 = inverted (180 degrees phase shift)

DACRPOL

Right DAC output polarity:

0 = non-inverted

1 = inverted (180 degrees phase shift)

AMUTE

Automute enable

0 = Amute disabled

1 = Amute enabled

DACOSR128

DAC oversampling rate:

0=64x (lowest power)

1=128x (best performance)

R10

DAC Control

SOFTMUTE

Softmute enable:

0=Disabled

1=Enabled

Table 22 DAC Control Register

The digital audio data is converted to oversampled bit streams in the on-chip, true 24-bit digital

interpolation filters. The bitstream data enters the multi-bit, sigma-delta DACs, which convert it to a

high quality analogue audio signal. The multi-bit DAC architecture reduces high frequency noise and

sensitivity to clock jitter. It also uses a Dynamic Element Matching technique for high linearity and

low distortion.

The DAC output defaults to non-inverted. Setting DACLPOL will invert the DAC output phase on the

left channel and DACRPOL inverts the phase on the right channel.

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