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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ATSAMB11XR 데이터시트(PDF) 37 Page - Microchip Technology |
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ATSAMB11XR 데이터시트(HTML) 37 Page - Microchip Technology |
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37 / 87 page  MUX_Sel Function Notes 11 I2C1 SCL 12 PWM 1 13 PWM 2 14 PWM 3 15 PWM 4 16 LP CLOCK OUT 32 kHz clock output (RC Osc. or RTC XO) 17 Reserved 18 Reserved 19 Reserved 20 Reserved 21 Reserved 22 Reserved 23 Reserved 24 Reserved 25 Reserved 26 Reserved 27 Reserved 28 Reserved 29 QUAD DEC X IN A 30 QUAD DEC X IN B 31 QUAD DEC Y IN A 32 QUAD DEC Y IN B 33 QUAD DEC Z IN A 34 QUAD DEC Z IN B An example of peripheral assignment using these MEGAMUX options is as follows: • I2C0 pin-MUXed on LP_GPIO_8 and LP_GPIO_9 via MUX1 and MEGAMUX= 8 and 9 (Table 9-2) • I2C1 pin-MUXed on LP_GPIO_14 and LP_GPIO_15 via MUX1 and MEGAMUX= 14 and 15 (Table 9-2) • UART1 pin-MUXed on LP_GPIO_2 and LP_GPIO_3 via MUX1 and MEGAMUX= 2 (Table 9-2) Another example is to illustrate the available options for pin LP_GPIO_3, depending on the pin-MUX option selected: • MUX0: the pin functions as bit 3 of the GPIO bus and is controlled by the GPIO controller in the ARM subsystem ATSAMB11XR/ZR © 2017 Microchip Technology Inc. Datasheet Preliminary DS70005342A-page 37 |
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