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ATSAMB11XR 데이터시트(PDF) 58 Page - Microchip Technology |
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ATSAMB11XR 데이터시트(HTML) 58 Page - Microchip Technology |
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58 / 87 page ![]() Figure 10-9. SPI Flash Master Timing Diagram Table 10-12. SPI Flash Master Timing Parameters(1) Parameter Symbol Min. Max. Units Clock Output Frequency(2) fSCK 13 MHz Clock Low Pulse Width tWL 25 ns Clock High Pulse Width tWH 27 Clock Rise Time(3) tLH 11 Clock Fall Time(3) tHL 10 RXD Input Setup Time tISU 19 RXD Input Hold Time tIHD 0 SSN/TXD Output Delay(3) tODLY 1 7 Note: 1. Timing is applicable to all SPI modes. 2. Maximum clock frequency specified is limited by the SPI Master interface internal design. Actual maximum clock frequency can be lower and depends on the specific PCB layout. 3. Timing based on 15 pF output loading. ATSAMB11XR/ZR © 2017 Microchip Technology Inc. Datasheet Preliminary DS70005342A-page 58 |
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