| 전자부품 데이터시트 검색엔진 |
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CS53L32A 데이터시트(PDF) 22 Page - Cirrus Logic |
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CS53L32A 데이터시트(HTML) 22 Page - Cirrus Logic |
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22 / 40 page ![]() CS53L32A 22 DS513F1 4.9 LEFT/RIGHT CHANNEL MUTE Analog I/O Control (address 03h) Access: R/W in Two Wire Mode and write only in SPI. Default: 0 - Disabled Function: Digital mute of the left and right channels. 4.10 SOFT RAMP AND ZERO CROSS ENABLE Analog I/O Control Register (address 03h) Access: R/W in Two Wire Mode and write only in SPI. Default: 11 - Soft Ramp and Zero Cross enabled Function: Soft Ramp Enable Soft Ramp allows level changes, both muting and attenuation, to be implemented via an incremental ramp. Digital volume control is ramped from the current level to the new level at a rate of 1/8 dB per left/right clock period. Analog volume control is ramped in 1 dB steps every 8 left/right clock periods in Base Rate mode, and 1 dB every 16 left/right clock periods in High Rate mode. Zero Cross Enable Zero Cross Enable dictates that signal level changes, either by attenuation changes or muting, will occur on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a timeout period of 512 sample periods in BRM or 1024 sample periods in HRM (approximately 10.7 ms at 48 kHz sample rate) if the signal does not encounter a zero crossing. The zero cross func- tion is independently monitored and implemented for each channel. 76543 210 MUTEL MUTER SOFT ZC RESERVED INDVC L=R HPFREEZE MUTEL/ MUTER MODE 0 Disabled 1 Enabled Table 8. Left/Right Channel Mute Enable 76543 210 MUTEL MUTER SOFT ZC RESERVED INDVC L=R HPFREEZE |
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