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MMPF0100Z 데이터시트(PDF) 63 Page - NXP Semiconductors

부품명 MMPF0100Z
상세설명  14 channel configurable power management integrated circuit
PDF  128 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0100Z 데이터시트(HTML) 63 Page - NXP Semiconductors

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PF0100Z
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
6.4.4.5.5
SW3A/B external components
Table 74. Register SW3BMODE - ADDR 0x46
Name
Bit #
R/W
Default
Description
SW3BMODE
3:0
R/W
0x80
Sets the SW3B (Independent) switching
operation mode. See Table 29 for all possible
configurations.
UNUSED
4
–
0x00
unused
SW3BOMODE
5
R/W
0x00
Set status of SW3B (Independent) when in sleep
mode.
0 = OFF
1 = PFM
UNUSED
7:6
–
0x00
unused
Table 75. Register SW3BCONF - ADDR 0x47
Name
Bit #
R/W
Default
Description
SW3BILIM
0
R/W
0x00
SW3B current limit level selection
0 = High level current limit
1 = Low level current limit
UNUSED
1
R/W
0x00
unused
SW3BFREQ
3:2
R/W
0x00
SW3B switching frequency selector. See Table 37.
SW3BPHASE
5:4
R/W
0x00
SW3B phase clock selection. See Table 35.
SW3BDVSSPEED
7:6
R/W
0x00
SW3B DVS speed selection. See Table 34.
Table 76. SW3A/B external component requirements
Mode
Components
Description
SW3A/B single
phase
SW3A/B dual
phase
SW3A independent
SW3B independent
CINSW3A(51)
SW3A input capacitor
4.7
μF4.7 μF4.7 μF
CIN3AHF(51)
SW3A decoupling input capacitor
0.1
μF0.1 μF0.1 μF
CINSW3B(51)
SW3B input capacitor
4.7
μF4.7 μF4.7 μF
CIN3BHF(51)
SW3B decoupling input capacitor
0.1
μF0.1 μF0.1 μF
COSW3A(51)
SW3A output capacitor
4 x 22
μF
2 x 22
μF
2 x 22
μF
COSW3B(51)
SW3B output capacitor
–
2 x 22
μF
2 x 22
μF
LSW3A
SW3A inductor
1.0
μH
DCR = 50 m
Ω
ISAT = 3.9 A
1.0
μH
DCR = 60 m
Ω
ISAT = 3.0 A
1.0
μH
DCR = 60 m
Ω
ISAT = 3.0 A
LSW3B
SW3B inductor
–
1.0
μH
DCR = 60 m
Ω
ISAT = 3.0 A
1.0
μH
DCR = 60 m
Ω
ISAT = 3.0 A
Notes
51.
Use X5R or X7R capacitors.



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